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19-3981; Rev 0; 1/06
Speed-Switching Clock Generator with Power Fail
General Description
The MAX7391 replaces ceramic resonators, crystals, and supervisory functions for microcontrollers in 3.3V and 5V applications. The MAX7391 provides a clock source, reset, and power-fail functions. The programmable power-fail function provides early warning of power failure and is configurable to detect either an external voltage or the VCC supply to the device. The clock output can be switched between normal and half-speed operation. This functionality allows the microcontroller to operate at reduced power and may be used to extend the time available to perform housekeeping tasks, such as writing data to flash during a power failure. Connecting the power-fail output to the SPEED input reduces clock speed automatically during power-fail events. The MAX7391 clock output is factory programmed to a frequency in the 1MHz to 16MHz range. Four standard frequencies are available. Other frequencies are available upon request. The maximum operating supply current is 5.5mA (typ) with a clock frequency of 12MHz. Unlike typical crystal and ceramic resonator oscillator circuits, the MAX7391 is resistant to EMI and vibration, and operates reliably at high temperatures. The highoutput drive current and absence of high-impedance nodes make the oscillator invulnerable to dirty or humid operating conditions. The MAX7391 is available in an 8-pin MAX(R) package. The MAX7391 standard operating temperature range is from -40C to +125C.
Features
Robust Microcontroller Clock and Supervisory Functions in a Single Package Integrated Reset and Power-Fail Functions Speed Select +2.7V to +5.5V Operation Factory-Trimmed Oscillator Reset Valid Down to 1.1V Supply Voltage 10mA Clock-Output Drive Current 4% Total Accuracy for -40C to +125C 2.75% Total Accurac for 0C to +85C 5.5mA Operating Current (12MHz Version) -40C to +125C Temperature Range Surface-Mount Package 1MHz to 16MHz Factory Preset Frequency Range
MAX7391
Ordering Information
PART MAX7391srff TEMP RANGE -40C to +125C PIN-PACKAGE 8 MAX PKG CODE U8-1
Applications
White Goods Automotive Appliances and Controls Handheld Products Portable Equipment Microcontroller Systems
Note: "s" is a placeholder for the reset output type. Insert the symbol found in Table 2 in the place of "s." "r" is a placeholder for the power-on reset (POR) voltage. Insert the symbol found in Table 1 in the place of "r." "ff" is a placeholder for the nominal output frequency. Insert the symbol found in Table 3 in the place of "ff." For example, MAX7391CMTP describes a device with 4.38V reset level, open-collector RST output, and a clock output frequency of 8MHz.
Pin Configuration
TOP VIEW
PFI 1 VCC 2 8 CLOCK 7 RST/RST
Typical Application Circuit, Functional Diagram, and Selector Guide appear at end of data sheet. MAX is a registered trademark of Maxim Integrated Products, Inc.
MAX7391
6 SPEED 5 PFO
N.C. 3 GND 4
MAX
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Speed-Switching Clock Generator with Power Fail MAX7391
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +6.0V All Other Pins to GND ................................-0.3V to (VCC + 0.3V) CLOCK, RST/RST, PFO Output Current ..........................50mA Continuous Power Dissipation 8-Pin MAX (derate 4.5mW/C over TA = +70C)........362mW Operating Temperature Range .........................-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, VCC = +2.7V to +5.5V, TA = -40C to +125C, 1MHz to 16MHz output frequency range, typical values at VCC = +5.0V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER POWER REQUIREMENTS Operating Supply Voltage Valid RST/RST Supply Voltage Operating Supply Current LOGIC INPUT: SPEED Input Leakage Current Logic-Input High Voltage Logic-Input Low Voltage PUSH-PULL LOGIC OUTPUTS: RST/RST Output High Output Low Output Low OUTPUT: CLOCK CLOCK Output High Voltage CLOCK Output Low Voltage CLOCK Accuracy VOHC VOLC fCLOCK ISOURCE = 5mA ISINK = 5mA Table 3, VCC = +5.0V -4 VCC - 0.3 0.3 +4 V V % VOH VOL VOLO ISOURCE = 1mA ISINK = 3mA ISINK = 3mA VCC - 1.5 0.05 0.05 0.4 0.4 V V V ILEAK VIH VIL Input is high 0.7 x VCC 0.3 x VCC 0.5 A V V VCC VCCR ICC Minimum supply voltage for valid RST/RST output, TA = 0C to +85C fCLOCK = 12MHz fCLOCK = 8MHz 2.7 5.5 1.1 5.5 4.5 V V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
OPEN-DRAIN LOGIC OUTPUTS: RST, PFO
2
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Speed-Switching Clock Generator with Power Fail
ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, VCC = +2.7V to +5.5V, TA = -40C to +125C, 1MHz to 16MHz output frequency range, typical values at VCC = +5.0V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Clock Frequency Temperature Coefficient Clock Frequency Supply Voltage Coefficient CLOCK Duty Cycle CLOCK Output Jitter Output Rise Time Output Fall Time INTERNAL POWER-ON RESET TA = +25C VTH+ Reset Voltage VTHReset Timeout Period POWER FAIL Power-Fail Select Threshold VCC Monitoring Threshold (Internal Threshold) Internal Threshold Hysteresis PFI Monitoring Threshold (External Threshold) External Threshold Hysteresis VSEL VITH VIHYST VETH VEHYST PFI input VCC rising VCC falling PFI rising PFI falling 0.65 x VCC 4.06 1.0 0.9 1.0 4.38 2 1.1 3.5 0.85 x VCC 4.60 4.0 1.4 8.0 V V %VITH V %VETH tRST VCC falling Figure 1 86 VCC rising, Table 1 TA = -40C to +125C VTH - 1.5% VTH - 2.5% 0.98 x VTH+ 135 250 s VTH + 1.5% VTH + 2.5% V tR tF SYMBOL CONDITIONS VCC = +5.0V (Note 2) TA = +25C (Note 2) (Note 2) Observation for 20s using a 500MHz oscilloscope CLOAD = 10pF, 10% to 90% of full scale (Note 2) CLOAD = 10pF, 90% to 10% of full scale (Note 2) 45 MIN TYP 140 0.67 50 310 2.5 2.5 7.0 7.5 MAX 400 1 55 UNITS ppm/C %/V % ps RMS ns ns
MAX7391
Note 1: All parameters are tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Not production tested.
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3
Speed-Switching Clock Generator with Power Fail MAX7391
Typical Operating Characteristics
(Typical Application Circuit, VCC = +5V, fCLOCK = 16MHz, TA = +25C, unless otherwise noted.)
FREQUENCY vs. SUPPLY VOLTAGE
MAX7391 toc01
FREQUENCY vs. TEMPERATURE
MAX7391 toc02
DUTY CYCLE vs. SUPPLY VOLTAGE
MAX7391 toc03
1.020
1.040 1.030 NORMALIZED FREQUENCY 1.020 1.010 1.000 0.990 0.980 NORMALIZED TO TA = +25C
52
NORMALIZED FREQUENCY
1.010
51 DUTY CYCLE (%)
1.000
50
0.990 NORMALIZED TO VCC = 5V VTH+ = 2.9V 0.980 2.90 3.55 4.20 VCC (V) 4.85 5.50
49 VTH+ = 2.9V 48 2.90 3.55 4.20 VCC (V) 4.85 5.50
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
DUTY CYCLE vs. TEMPERATURE
MAX7391 toc04
CLOCK OUTPUT WAVEFORM WITH CL = 10pF
MAX7391 toc05
CLOCK OUTPUT WAVEFORM WITH CL = 50pF
MAX7391 toc06
52
VCC = 3.3V
VCC = 3.3V
51 DUTY CYCLE (%)
50
CLOCK 1V/div
CLOCK 1V/div
49
48 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 40ns/div 40ns/div
CLOCK OUTPUT WAVEFORM WITH CL = 100pF
MAX7391 toc07
SUPPLY CURRENT vs. TEMPERATURE
MAX7391 toc08
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7391 toc09
5
5
4 ICC (mA) CLOCK 1V/div
VCC = 5V
4 ICC (mA)
3 VCC = 3.3V 2
3
2 VTH+ = 2.9V
1 40ns/div -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
1 2.90 3.55 4.20 VCC (V) 4.85 5.50
4
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Speed-Switching Clock Generator with Power Fail MAX7391
Typical Operating Characteristics (continued)
(Typical Application Circuit, VCC = +5V, fCLOCK = 16MHz, TA = +25C, unless otherwise noted.)
CLOCK SETTLING TIME FROM START
MAX7391 toc10
POWER-ON RESET BEHAVIOR
MAX7391 toc11
MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE
MAX7391 toc12
1000 VCC 5V/div
VCC 2V/div
TRANSIENT DURATION (s)
RESET OCCURS ABOVE THIS CURVE 100
CLOCK 2V/div
CLOCK 5V/div RST 5V/div PFO 5V/div
10
VCC FALLING FROM VTH+ + 100mV 1 100 200 300 400 500 600 700 800 900 1000 RESET THRESHOLD OVERDRIVE (mV)
1s/div
20s/div
CLOCK RESPONSE TO SPEED SELECT INPUT
MAX7391 toc13
RISING THRESHOLD vs. TEMPERATURE
MAX7391 toc14
2.90
SPEED 2V/div
VTH+ (V)
2.88
2.86
2.84
CLOCK 2V/div
2.82
2.80
200ns/div
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
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5
Speed-Switching Clock Generator with Power Fail MAX7391
Pin Description
PIN 1 2 3 4 5 6 NAME PFI VCC N.C. GND PFO SPEED FUNCTION Power-Fail Input. PFI monitors the condition of either an external supplied voltage or VCC. See the Power Fail section for more details. Power Input. Connect VCC to the power supply. Bypass VCC to GND with a 0.1F capacitor. Install the bypass capacitor as close to the device as possible. No Connection Ground Power-Fail Output. Open-drain output asserts when the voltage being monitored drops below the power-fail threshold voltage. Clock-Speed Select Input. Connect SPEED high for the factory-trimmed clock output frequency. Connect SPEED low to reduce the clock output frequency by half. Reset Output. Reset output is available in one of three configurations: push-pull RST, push-pull RST, or open-drain RST. The reset output occurs if any combination of the following conditions occurs: reset output is asserted during power-up, and whenever VCC is below the reset threshold level; for devices with WDI, reset output asserts when WDI does not receive a rising or falling edge within the watchdog timeout period. Clock Output
7
RST/RST
8
CLOCK
Detailed Description
The MAX7391 replaces ceramic resonators, crystals, and supervisory functions for microcontrollers in 3.3V and 5V applications. The MAX7391 provides a clock source, reset, and power-fail functions. The power-fail output provides early warning of power failure. The power-fail threshold is configurable to detect either an external voltage or the VCC supply voltage to the device. The clock output can be switched between normal and half-speed operation. This functionality allows the microcontroller to operate at reduced power and may be used to extend the time available to perform housekeeping tasks, such as writing data to flash, during a power failure. Connecting the power-fail output (PFO) to the SPEED input reduces clock speed automatically during power-fail events. The integrated reset provides the power-supply monitoring functions necessary to ensure correct microcontroller operation. The reset circuit has built-in power-supply transient immunity and provides both power-on reset and power-fail or brownout reset functionality. Two standard factory-trimmed reset levels are available. A power-fail function is provided for power-supply voltage monitoring and can provide advance notice of an impending power failure. The power-fail input monitors external power-supply voltages through an external resistive divider. Connect PFI to VCC to monitor VCC.
Clock Output (CLOCK)
The push-pull clock output (CLOCK) drives a groundconnected 1k load or a positive supply connected 500 load to within 300mV of either supply rail. CLOCK remains stable over the full operating voltage range and does not generate short output cycles during either power-on or power-off. A typical startup characteristic is shown in the Typical Operating Characteristics section. The clock output frequency is reduced by a factor of two by taking SPEED low. This functionality allows the microcontroller to operate at reduced power and may be used to extend the time available to perform housekeeping tasks, such as writing data to flash during power failure.
Reset
The reset function drives the microcontroller reset input to prevent operation in the cases of the initial power-on setting, low power-supply voltages, and the failed watchdog operations. Three reset output versions are available: push-pull RST, push-pull RST, and open-drain RST. The reset timeout period (tRST) is nominally 135s. Power-On Reset (POR) The internal power-on reset (POR) circuit detects the power-supply voltage (VCC) level at startup. The POR circuit starts the oscillator when VCC exceeds the reset rising threshold level (VTH+). The reset output remains asserted from the time VCC crosses the VTH+ and continues to be asserted for the reset timeout period (tRST). Upon completion of the reset timeout, the reset output is released. See Figure 1.
6
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Speed-Switching Clock Generator with Power Fail
Low-Voltage Lockout The reset output asserts whenever VCC drops below the reset falling threshold, VTH-. The difference between the reset rising and falling threshold values is VTH+ - (VTH-). The nominal hysteresis value is 2% of the reset rising threshold value. The reset detection circuitry provides filtering to prevent triggering on negative voltage spikes. See the Typical Operating Characteristics for a plot of maximum transient duration without causing a reset pulse vs. reset comparator overdrive. Figure 1 shows the reset output (RST/RST) behavior during power-up and brownout. Power Fail The power-fail function provides early warning of a power failure. The power-fail comparator detects the condition of either an external voltage or the VCC supply voltage. Internal (VCC) detection is configured by connecting PFI to VCC. The internal VCC rising threshold (VITH) is set at 4.38V. The open-drain PFO asserts low if the VCC
5 4 VCC (V) 3 2 1 VCCR VTH+ VITH VITH - VIHYST VTH-
supply voltage drops below the VCC falling threshold value (VIHYST). The VCC falling threshold is nominally 2% below the VCC rising threshold. External power-fail detection is selected when the applied voltage on PFI (VPFI) is less than 0.65 x VCC (VSEL minimum). When the voltage on PFI is more than 0.85 x VCC (VSEL maximum), the device switches to internal monitoring. External power-fail detection is normally used with a resistive divider from the supply being monitored. See the Typical Application Circuit. For a 3.3V supply, the voltage on PFI needs to be set externally and less than 0.65 x VCC (VSEL minimum). To set the voltage on PFI externally, choose R1 and R2 so that: VPFI = R2 x PowerSupply R2 + R1
MAX7391
See Figure 1 for PFO behavior during power-up and brownout.
CLK
RST
tRST
PFO CLOCK STARTS ON INTERNAL POR (VTH+, VCC RISING). RST RELEASES AFTER THE RESET TIMEOUT PERIOD. PFO ASSERTS AS VCC DROPS BELOW VTH. CLOCK FREQUENCY REDUCTION SHOWN IS ACHIEVED BY CONNECTING SPEED TO PFO. RST ASSERTS ON RESET FALLING VOLTAGE (VTH-, VCC FALLING). CLOCK STOPS. RST CONTINUES TO ASSERT UNTIL VCCR.
Figure 1. RST/RST and PFO Behavior During Power-Up and Brownout
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7
Speed-Switching Clock Generator with Power Fail MAX7391
Selector Guide
PART MAX7387 MAX7388 MAX7389 MAX7390 MAX7391 FREQUENCY RANGE (MHz) 1 to 32 1 to 32 1 to 32 1 to 32 1 to 32 RESET FUNCTION Yes Yes Yes Yes Yes WATCHDOG INPUT (WDI) / WATCHDOG OUTPUT (WDO) Yes/yes Yes/no Yes/yes Yes/no -- POWER-FAIL INPUT (PFI)/POWER-FAIL OUTPUT (PFO) Yes/yes No/yes -- -- Yes/yes SPEED -- -- -- Yes Yes PINPACKAGE 10 MAX 8 MAX 8 MAX 8 MAX 8 MAX
Note: Other versions with different features are available. Refer to the MAX7387/MAX7388 and MAX7389/MAX7390 data sheets.
Applications Information
Interfacing to a Microcontroller Clock Input
The clock output is a push-pull, CMOS logic output, which directly drives any microprocessor (P) or microcontroller (C) clock input. There are no impedancematching issues when using the MAX7391. Operate the MAX7391 and C (or other clock input device) from the same supply voltage level. Refer to the microcontroller data sheet for clock-input compatibility with external clock signals. Table 3 lists clock output frequency. The MAX7391 requires no biasing components or load capacitance. When using the MAX7391 to retrofit a crystal oscillator, remove all biasing components from the oscillator input.
Power-Supply Considerations
The MAX7391 operates with power-supply voltages in the 2.7V to 5.5V range. Good power-supply decoupling is needed to maintain the power-supply rejection performance of the MAX7391. Bypass VCC to GND with a 0.1F surface-mount ceramic capacitor. Mount the bypass capacitor as close to the device as possible. If possible, mount the MAX7391 close to the microcontroller's decoupling capacitor so that additional decoupling is not required. A larger-value bypass capacitor is recommended if the MAX7391 is to operate with a large capacitive load. Use a bypass capacitor value of at least 1000 times that of the output load capacitance.
Output Jitter
The MAX7391's jitter performance is given in the Electrical Characteristics table as a peak-to-peak value obtained by observing the output of the device for 20s with a 500MHz oscilloscope. Jitter measurements are approximately proportional to the period of the output frequency of the device. Thus, a 4MHz part has approximately twice the jitter value of an 8MHz part. The jitter performance of all clock sources degrades in the presence of mechanical and electrical interference. The MAX7391 is immune to vibration, shock, and EMI influences, and thus provides a considerably more robust clock source than crystal- or ceramic-resonatorbased oscillator circuits.
Table 1. POR Voltage
POWER-ON RESET VOLTAGE (VTH) 4.38 3.96 3.44 3.34 3.13 2.89 2.82 2.5 r M J N P Q S V X
Note: Standard values are shown in bold. Contact factory for other POR voltages.
Table 3. Clock Output Frequency
CLOCK FREQUENCY (fCLOCK) (MHz) ff RD TP VB WB 4 8 12 16
Table 2. Reset Output Type
OUTPUT TYPE Push-pull RST Push-pull RST Open collector RST s A B C
Note: Contact factory for other frequencies.
Note: Standard values are shown in bold. Contact factory for other output types. 8 _______________________________________________________________________________________
Speed-Switching Clock Generator with Power Fail
Functional Diagram
MAX7391
MAX7391
RST/RST
POWER-ON RESET
PRESCALER OSCILLATOR
RESET TIMER CLOCK SPEED
PFI
PFO INTERNAL (VCC DETECTION) V_TH
N
GND
Typical Application Circuit
POWER SUPPLY DC-DC 5V
VCC R1
RST/RST
RST/RST
PFO
INT C
MAX7391
PFI SPEED
R2 CLOCK OSC1
GND
Chip Information
PROCESS: BiCMOS
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Speed-Switching Clock Generator with Power Fail MAX7391
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
8LUMAXD.EPS
8
4X S
8
INCHES DIM A A1 A2 b c D e E H MIN 0.002 0.030 MAX 0.043 0.006 0.037
MILLIMETERS MAX MIN 0.05 0.75 1.10 0.15 0.95
O0.500.1 0.60.1
E
H
1
0.60.1
1
D
L
S
BOTTOM VIEW
0.014 0.010 0.007 0.005 0.120 0.116 0.0256 BSC 0.120 0.116 0.198 0.188 0.026 0.016 6 0 0.0207 BSC
0.25 0.36 0.13 0.18 2.95 3.05 0.65 BSC 2.95 3.05 4.78 5.03 0.41 0.66 0 6 0.5250 BSC
TOP VIEW
A2
A1
A
e
c b L
SIDE VIEW
FRONT VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
APPROVAL DOCUMENT CONTROL NO. REV.
21-0036
J
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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